Power semiconductor devices include power field effect transistors (FETs), insulated gate bipolar transistors (IGBTs), power transistors, power diodes, and power gallium arsenide transistors (GAs). In the past the common package for power semiconductor chips was the TO-3 can. The TO-3 package has a number of disadvantages. The wire bonds inside the package and the wires extending through the can have significant impedance the wire bonds have resistance which add to the on-resistance of the device. As chip designs have been improved to lower the resistance of the device, the resistance of the aluminum wires has become a large percentage of the total resistance of the package. The packaging efficiency of the TO-3 can is poor since the package is many times larger in surface area, volume and weight than the semiconductor chip it contains.
In the packages for logic semiconductors, the flip chip or C4 (Controlled Collapse Chip Connection) has achieved the lowest impedance by eliminating wire bonds, and the highest packaging efficiency, up to 90% for a 10 mm.times.10 mm die. The flip chip and C4 packages use specially prepared "bumped" chips with metallization built up on the contact pads to provide bumps for solder connection or connection by solder coated balls to the package.
Many power semiconductor chips come with a solderable back contact and aluminum metallization on the top surface. Solder can't be used on aluminum pads. Power semiconductor chips have been bumped using wire bonding machines to form multiple bumps on aluminum contact pads of the chips. A gold wire ball bond is made on the contact pad, as in conventional wire bonding, but the wire is severed at the ball bond, and the ball remains on the contact pad as a gold bump.
In one proposed package for power semiconductor chips, the chip is bonded to a metallic base; also bonded to the base is a frame which surrounds the chip. An alumina ceramic lid, provided with holes containing copper balls for contact to the chip, is bonded to the frame over the chip. The copper balls are soldered to the gold bumps on the chip and make contact through the lid to copper foils bonded to the outer alumina surface. Since the metallic base is bonded to the bottom of the frame, and the alumina lid is bonded over the top of the frame there is a height tolerance problem, because the height of the frame must compensate for any variation in flatness of the internal components of the package. To overcome this problem it has been proposed to make the alumina lid somewhat smaller than the frame and a ring of free standing copper foil between the frame and the lid would form a somewhat flexible medium to take up variations in the height of the package.
In other proposed packages, a copper foil is bonded to the wire bond gold bumps on the chip and part of the foil is formed into tabs which in one variation are insulated on one side with polyimide and then folded over to make contact with copper balls in the lid. In another variation foil tabs are bought out through the lid of the package, and the package hermetically sealed by soldering the foil tabs to copper foil lands bonded to the lid.
The mismatch of the thermal expansion coefficients of alumina and the copper foil leads to failure mechanisms that affect the adhesion of copper foil to the substrate and the hermetic seal of the package. When the copper foil is joined to the copper balls, the copper foil is deformed, stressed and thinned; it is subject to the further stress of thermal mismatch leading to breaks and stress corrosion.
Miniature flexible circuits have been designed to provide packaging efficiencies similar to the C4 process. The flexible circuits can be used with conventional integrated circuits having perimeter contacts. Gold conductors of the flexible circuit are thermosonically bonded the integrated circuits contacts. The conductors of the flexible circuit don't fan out from the integrated circuit contacts into the area around the chip, instead the conductors fan in underneath the chip terminating in a grid array of metal bumps underneath the chip for interconnection to second level packaging. The flexible circuit is bonded to the chip with an elastomeric adhesive 0.15 mm (6 mil) thick. The organic elastomeric adhesive and flexible circuit materials limit the temperature range in manufacture and use, do not permit good thermal transfer, make the package sensitive to moisture, and prevent use as hermetically sealed packages.